1. Field of the Invention
The present invention relates to a method for producing a silicon wafer with <110> crystal orientation, and to a silicon wafer produced in this way.
2. Background Art
Monocrystalline silicon, in particular in the case of silicon ingots having large diameters (>=300 mm), is grown by means of the so-called Czochralski (CZ) method. In this case, a seed crystal is brought to the surface of silicon melted in a quartz crucible and is slowly pulled upward. In this case, firstly a neck is produced, then the pulling rate is reduced and a conical region is formed which merges into a cylindrical region of the crystal. The orientation of the crystal lattice with respect to the pulling axis of the crystal is usually predetermined by the crystal orientation of the seed crystal. The crystal growth direction is usually parallel to the crystal pulling direction or perpendicular to the corresponding crystal plane of a cross section of the ingot perpendicular to the crystal pulling direction.
Numerous types of crystal defects can arise during the growth of a single crystal during the CZ method. It is desirable to grow crystals which have as few of such defects as possible. Particularly important defects are slip dislocations. Such dislocations can arise at numerous points in the crystal pulling process, but will be encountered particularly during a first part of the pulling process, caused by a temperature difference between the melt surface and the seed crystal. Dislocations are dynamic and tend to propagate in directions of minimal free energy in the crystal lattice.
During conventional crystal growth in which a <001> crystal orientation is desired, dislocations often propagate in directions that are inclined relative to the pulling axis, since these directions represent paths of minimal energy. This is disclosed in JP 03-080184, for example. Through suitable lengthening of the thin neck, these dislocations propagate to the neck surface and disappear there before the conical part and subsequently the actual cylindrical crystal piece are produced. Dislocations which propagate closer along the crystal growth axis but not parallel thereto are predominantly eliminated by thinning the neck to a relatively small diameter, that is to say producing a so-called “thin neck” (also referred to as a “dash neck” in the literature). The teaching of U.S. Pat. No. 5,628,823 includes growing a long neck having a diameter of approximately 10 mm in order to reduce dislocations, and furthermore producing a neck that can bear a corresponding weight of a long crystal.
For some applications it is desirable to provide silicon wafers having crystal orientations other than <001>. One of these alternative orientations is <110>. This crystal orientation is advantageous owing to its higher hole mobility, inter alia.
In crystals grown with <110> orientation, the crystal planes of low energies are {111} planes, that is to say perpendicular to a {110} plane. The dislocations therefore propagate in a direction parallel to the <110> crystal axis. Thus, these dislocations cannot be eliminated by growing a conventional neck since these dislocations, which lie parallel to the neck axis rather than at an angle to said axis, do not propagate to the surface of the neck. It can be seen that each silicon wafer produced from a single crystal pulled in this way would contain dislocations.
In order to avoid this problem, JP 03 080184 proposes using a seed crystal with slight misorientation, such that the directions of low energy in which the dislocations propagate are inclined slightly relative to the growth axis. As a result of tilting the directions of low energy with respect to the growth axis, the dislocations propagate to the surface of the neck and are eliminated before the cylindrical crystal piece is produced.
U.S. Pat. No. 5,769,941 is also concerned with the elimination of axially propagating dislocations in <110>-oriented crystals. This is achieved by tilting the seed crystal and thus tilting the <110> direction (normal to {110} plane) from the crystal axis, which allows the dislocations to propagate to the neck surface.
In all of the methods known in the prior art, a misoriented silicon single crystal is produced, wherein the misorientation is e.g. 2 to 5° (U.S. Pat. No. 5,769,941), or indeed any angle between the <001> and <101> directions (JP 03 080184) can be selected. JP 63 123893 discloses a crystal with a misorientation of 0.2 to 4°.
It has been shown that the extent of the misorientation greatly influences properties of the silicon wafers produced therefrom. It is often desirable to provide a silicon wafer with an epitaxial layer.
It was shown in EP 1 592 045 A1 that the surface roughness of the epitaxial layer of a <110>-misoriented wafer depends on the angle of inclination (angle between normal to wafer surface with respect to real <110> direction) and is less than the roughness of the polished silicon wafer (without an epitaxial layer). This effect can be observed at angles of inclination of 0 to 8°.
AFM micrographs show steps and shoulders in <110> orientation on the epitaxial layer. According to EP 1 592 045 A1, the width of a shoulder can be projected directly from the angle of inclination and the distance between two steps. If the angle of inclination exceeds 1°, the width of the shoulder between monoatomic layer steps is 10 nm or less.
A misorientation (angle of inclination) of 0° is practically unattainable even if attempts are made to completely reduce the misorientation again after CZ pulling by means of suitable measures (e.g. by oriented wire sawing). During wire sawing, the misorientation of a semiconductor ingot (without the beginning and end cones) is usually reduced by suitable orientation of the rod piece cemented on a sawing strip relative to the wire gang—formed from sawing wire—of a wire saw. Since a sawing strip can never be oriented completely exactly and relatively small inaccuracies cannot be precluded, a misorientation of exactly 0° will be achieved only in rare cases. Therefore, when crystals or wafers with misorientation of 0° are discussed in the context of this invention, it should be taken into account that relatively small deviations of up to approximately 10 minutes or 0.2° (also cf. JP 63 123893) should be taken into account.
A correction of the misorientation of individual rod pieces during the wire sawing process has the consequence that the sawn silicon wafers have an oval wafer shape since the wire saw gang forms an angle < > 90° with the cylindrical outer surface of the rod piece. This gives rise essentially to two problem areas in terms of production engineering: firstly, so-called “halfmoon wafers” arise as a result of the oblique cut at both rod piece ends, and make it impossible for the wafers to be isolated automatically from the carbon strip usually used, and, secondly, the complexity during edge rounding is significantly increased since special technologies have to be made available for the rounding of oval wafers. What is more, transporting oval, unrounded wafers in commercially available cassettes can lead to an increase in the probability of edge chipping, which would result in the wafers being rejected. Moreover, the manual handling of “halfmoon wafers” is associated with an increased safety risk for the operators on account of the razor-sharp edges.